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5 - Tutorial on the 6264 RAM

Published online by Cambridge University Press:  10 November 2009

Charles D. Spencer
Affiliation:
Ithaca College, New York
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Summary

Memory is the second building block for measurement circuitry. In the parallel approach described so far, the maximum rate of data acquisition is determined by how fast the host computer can poll for data ready, input 1 or 2 bytes, carry out housekeeping operations (such as determining when to terminate acquisition), and then resume polling for the next data. For the ADC circuit in Chapter 4, with the 20μsec ADC and a 12.5 MHz PC AT compatible using Microsoft QuickBASIC, the maximum rate of converting voltage and inputting and storing 8-bit values is around 2000 readings/second. The capability for faster rates is desirable. A way to accomplish this is for the hardware to temporarily store data in its own memory. Then, after acquisition, the values are read by the host computer. This chapter introduces a particular memory chip, shows how to interface it to the parallel ports, presents control software, and gives a detailed application. Later, Chapter 10 describes a fast voltage measurer which uses memory.

A memory integrated circuit contains a set of storage locations each with a unique address. To write a value to a location, the address is specified, the value is made available, and the chip is told to store the value. To read a previously stored value, the address is specified and the chip is instructed to make the value available. Memory IC's are characterized by the number of storage locations, the bit size of stored values, and the control protocol.

The 8K by 8-bit 6264 static random access memory has been selected for temporary data storage. It is produced by several manufacturers and comes in a variety of models and speeds.

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Publisher: Cambridge University Press
Print publication year: 1990

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  • Tutorial on the 6264 RAM
  • Charles D. Spencer, Ithaca College, New York
  • Book: Digital Design for Computer Data Acquisition
  • Online publication: 10 November 2009
  • Chapter DOI: https://doi.org/10.1017/CBO9780511608247.006
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  • Tutorial on the 6264 RAM
  • Charles D. Spencer, Ithaca College, New York
  • Book: Digital Design for Computer Data Acquisition
  • Online publication: 10 November 2009
  • Chapter DOI: https://doi.org/10.1017/CBO9780511608247.006
Available formats
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Save book to Google Drive

To save content items to your account, please confirm that you agree to abide by our usage policies. If this is the first time you use this feature, you will be asked to authorise Cambridge Core to connect with your account. Find out more about saving content to Google Drive.

  • Tutorial on the 6264 RAM
  • Charles D. Spencer, Ithaca College, New York
  • Book: Digital Design for Computer Data Acquisition
  • Online publication: 10 November 2009
  • Chapter DOI: https://doi.org/10.1017/CBO9780511608247.006
Available formats
×