Book contents
- Frontmatter
- Contents
- Preface
- List of gate symbols
- 1 Introduction
- 2 Fault models
- 3 Combinational logic and fault simulation
- 4 Test generation for combinational circuits
- 5 Sequential ATPG
- 6 IDDQ testing
- 7 Functional testing
- 8 Delay fault testing
- 9 CMOS testing
- 10 Fault diagnosis
- 11 Design for testability
- 12 Built-in self-test
- 13 Synthesis for testability
- 14 Memory testing
- 15 High-level test synthesis
- 16 System-on-a-chip test synthesis
- Index
1 - Introduction
Published online by Cambridge University Press: 05 June 2012
- Frontmatter
- Contents
- Preface
- List of gate symbols
- 1 Introduction
- 2 Fault models
- 3 Combinational logic and fault simulation
- 4 Test generation for combinational circuits
- 5 Sequential ATPG
- 6 IDDQ testing
- 7 Functional testing
- 8 Delay fault testing
- 9 CMOS testing
- 10 Fault diagnosis
- 11 Design for testability
- 12 Built-in self-test
- 13 Synthesis for testability
- 14 Memory testing
- 15 High-level test synthesis
- 16 System-on-a-chip test synthesis
- Index
Summary
We introduce some basic concepts in testing in this chapter. We first discuss the terms fault, error and failure and classify faults according to the way they behave over time into permanent and non-permanent faults.
We give a statistical analysis of faults, introducing the terms failure rate and mean time to failure. We show how the failure rate varies over the lifetime of a product and how the failure rates of series and parallel systems can be computed. We also describe the physical and electrical causes for faults, called failure mechanisms.
We classify tests according to the technology they are designed for, the parameters they measure, the purpose for which the test results are used, and the test application method.
We next describe the relationship between the yield of the chip manufacturing process, the fault coverage of a test (which is the fraction of the total number of faults detected by a given test) and the defect level (the fraction of bad parts that pass the test). It can be used to compute the amount of testing required for a certain product quality level.
Finally, we cover the economics of testing in terms of time-to-market, revenue, costs of test development and maintenance cost.
Faults and their manifestation
This section starts by defining the terms failure, error and fault; followed by an overview of how faults can manifest themselves in time.
- Type
- Chapter
- Information
- Testing of Digital Systems , pp. 1 - 25Publisher: Cambridge University PressPrint publication year: 2003