Introduction
A duplexer circuit plays an important role in the RF transceiver, which helps to direct a common input signal into two individual output streams at different time instant. Now a days, time division duplex (TDD) is highly demanding scheme for the duplexer circuit. Generally, a single-pole double-throw (SPDT) switch is dominantly used for TDD operation, where the SPDT switch is followed by a duplexer as shown in Fig. 1(a), where the series SPDT switch configuration is operated at 2.4 GHz [Reference Misran, Shairi, The and Said1]. Many circuit designer have adopted conventional PCB design process for the implementation of SPDT switch at L, S, X, and Ka bands [Reference Hansen, Rave, Rohrdantz and Jacob2–Reference Jang, Kong, Lee, Park, Kim and Lee8]. However, the conventional PCB fabrication approach is rarely employed in millimeter-wave applications due to the significant radiation loss and undesirable surface wave loss produced by the varied dimensions of a microstrip line. With the development of the modern 5G wireless communication system, the designated millimeter wave frequency bands should support the TDD scheme, and hence a new millimeter wave SPDT switch circuit is needed. The main challenge of designing such a circuit involves maintaining good isolation between two output ports while maintaining low insertion loss and good impedance matching in the desired path. Designing millimeter wave SPDT switch circuit at high frequencies require additional considerations about PCB material and transmission line theory. Recently, a novel planar configuration of the conventional coaxial line, named the substrate integrated coaxial line (SICL), has been proposed. It is used to compensate for all of these issues in millimeter wave frequency applications [Reference Gatti, Bozzi, Perregrini, Wu and Bosisio9].
Figure 1. (a) Conventional SPDT switch in RF transceiver system. (b) Proposed equivalent circuit of SPDT switch.
The SICL acts as a printed version of a typical coaxial line created by encircling a conducting strip with metallic plates and laterally confining it with plated through holes (PTHs) on both sides. The coaxial nature of SICL is improved by a conducting strip imposed through the PTHs. Due to the similar nature of a coaxial line, SICL allows single-mode TEM wave propagation across a wide frequency range, and the self-shielding configuration helps to implement low-loss lines in millimeter wave frequencies [Reference Krishna and Mukherjee10–Reference Shukla and Mukherjee13]. In this paper, the proposed SICL based SPDT switch circuit adopts a low-cost PCB design technique at 27–28.5 GHz as shown in Fig. 2. The proposed network comprises of SPDT switching circuit using a series of butterfly stubs and mounting pads for the integration of diodes and capacitors which was introduced in [Reference Shukla and Mukherjee14]. However, the placement of the butterfly stubs at the middle layer eliminates the possibility of spurious radiation as it is shielded by the top and bottom copper plates in asymmetric stripline environment and increases the isolation between RF and DC paths. The sidewall ensures good shielding of the main RF line channels, which helps to improve the impedance matching between Tx to Tx/Rx and Rx to Tx/Rx channel. A single-layer ceramic capacitors (DC blocks) are mounted on the top layer of the SICL in the path of Tx to Tx/Rx and Rx to Tx/Rx. The main contributions of our research work are summarized as follows:
• The proposed design adopts SICL technology to implement a SPDT switch in a low-profile planar configuration which performs TDD operation. To the best of author’s knowledge, this is the first time to realize a planar SPDT switch circuit for duplexer application using SICL technology in 27–28.5 GHz.
• The self-shielded structure of SICL helps the proposed circuit to operate at millimeter wave frequencies with satisfactory performance.
• The proposed design provides a mechanism to connect SMD components with SICL technology which is an important stepping stone for realizing SICL based systems [Reference Shukla and Mukherjee14].
• The RF isolation network is introduced in an asymmetric stripline environment where the placement of the butterfly stub at the middle layer eliminate the possible chance of spurious radiation as it is shielded by the top and bottom copper plates and increases the RF isolation between RF and DC path which helps to supply better transmission at the two output streams in millimeter-wave communication systems.
Figure 2. 3-D view of the proposed duplexer.
The explanation of design procedure for the proposed duplexer is shown in section “Design procedure of proposed SPDT switch”. The results and discussion of the circuit are presented in section “Experimental results and discussion.”
Design procedure of proposed SPDT switch
In this paper, two 0.25-mm thick Taconic TLY-5 (ϵr = 2.2, tanδ = 0.0009) based substrate along with bond layer Taconic FR-28 prepreg (ϵr = 2.8, tanδ = 0.0014) is used to realize the proposed design. The proposed circuit introduces an RF isolation network which are used to activate the RF switches in the corresponding channels (Tx and Rx) by the DC supply. The equivalent circuit and physical layout of the proposed circuit are shown in Figs. 1(b) and 3, respectively.
Figure 3. Physical structure of the proposed duplexer circuit.
Design of RF isolation network for DC supply
Figure 4(a) and (b) show the physical layout and stack up of the substrate for the proposed isolation circuit where a series of three butterfly stubs are used for the high isolation in the middle layer of the substrate, which is separated from the top and bottom ground plate as an asymmetric stripline structure [Reference Shukla and Mukherjee14]. The characteristic impedance of the asymmetric stripline (
$Z_{0,AS}$) depends on the ratio of the conductor width and distance between the signal and ground planes. The characteristics impedance (
$Z_{0,AS}$) can be calculated as follows [Reference Wadell15]:
\begin{equation} Z_{0,AS}=\frac{1}{\sqrt{\epsilon_{r}}} \left [Z_{0,SS}\left ( \epsilon_{r}=1, H=h_{1}+h_{2}+t \right)-\Delta Z_{0,air} \right],\end{equation}
Figure 4. Physical layout of a series butterfly stubs with the dimension 
$R_{i}= 0.16$ mm, 
$R_{o}= 1.9$ mm, 
$\theta= 23^o$, w = 0.24 mm. (a) Top view. (b) Substrate stackup of the proposed design where 
$h_{1}=0.354$ mm, 
$h_{2}=0.254$ mm, and 
$h_{3}=0.1$ mm. (c) The proposed equivalent circuit model of the series butterfly stubs with lossless central transmission lines. (d) Response of EM and circuit simulation of the series butterfly stubs with lossless central transmission lines from optimized values of 
$L_{t1}=0.38$ nH, 
$C_{t1}=0.0856$ pF, 
$L_{t2}=0.289$ nH, 
$C_{t2}=0.0373$ pF, 
$C_{s1}=0.064$ pF, 
$L_{s1}=0.54$ nH, 
$C_{t3}=0.14$ 
$L_{t3}=0.5$ nH, 
$C_{p1}=0.0133$ pF, 
$C_{p2}=0.0133$ pF.
where 
$Z_{0,SS}(\epsilon_{r}$= 1, H= h 1+h 2+t) is the characteristics impedance of symmetric stripline. The value of 
$Z_{0,SS}$ is derived from (2)–(4), with air as the dielectric and having total thickness (H = 
$h_{1}+h_{2}+t$):
\begin{equation}Z_{0,SS}=\frac{\eta_{0}}{2\pi\sqrt{\epsilon_{r}}} \ln\left\{1+\frac{4H}{\pi w'} \left [ \frac{8H}{\pi w'} + \sqrt{\left ( \frac{8H}{\pi w'}\right)^{2}+6.27}\right]\right \},\end{equation}where
\begin{equation}w'=w+\frac{t}{\pi}\ln\left \{\frac{e}{\sqrt{\left ( \frac{t}{2H+t} \right)^{^{2}}+\left (\frac{\pi t}{4\left ( w+1.1t \right)} \right)^{m}}} \right \},\end{equation}
\begin{equation}m=\frac{6H}{3H+2t},\end{equation}and
\begin{equation}\Delta Z_{0,air}= 0.0325\pi Z_{0,air}^{2}\left ( 0.5-\frac{1}{2} \frac{2h_{1}+t}{h_{1}+h_{2}+t}\right)^{2.2}\times n\end{equation}
\begin{equation} n=\left ( \frac{t+w}{h_{1}+h_{2}+t}\right)^{2.9},\end{equation} where h 1 is the distance between the signal line and the lower reference plane, h 2 is the distance between the signal line and the upper reference plane, and 
$Z_{0,air}$ is represented by Equation (7):
\begin{equation}
Z_{0,air}=2\left[\frac{Z_{0,SS}\left( \epsilon_{r}=1,H=h_{1} \right)Z_{0,SS}\left( \epsilon_{r}=1,H=h_{2} \right)}{Z_{0,SS}\left(\epsilon_{r}=1,H=h_{1} \right)+Z_{0,SS}\left(\epsilon_{r}=1,H=h_{2} \right)
} \right],\end{equation} where 
$Z_{0,SS}(\epsilon_{r}=1,H=h_{1})$ is the characteristic impedance of symmetric stripline as shown in (2) with air as the dielectric and having total thickness of the line equal to h 1; and 
$Z_{0,SS}(\epsilon_{r}=1,H= h_{2})$ is the characteristic impedance of symmetric stripline with air as the dielectric and total thickness of the line equal to h 2.
The series of butterfly stubs is connected with a lossless central transmission line sections. The equivalent circuit parameters of the bias line are obtained with the help of the telegrapher’s equation parameters as described in [Reference Hong and Lancaster16]. A high-impedance lossless line terminated at both ends by relatively low-impedance lines can be presented by a π-equivalent circuit, as shown in Fig. 4(c). Also, the small section of high impedance line with radial stub at both ends introduces discontinuity at the junction which is represented by another π circuit. The values of Lt and Ct can be obtained from (8) and (9):
\begin{equation} L_{t}=\frac{1}{2\pi f_{1}}\times Z_{0,AS}\times \sin\left (\frac{2\pi l}{\lambda_{g}}\right),\end{equation}
\begin{equation}C_{t}=\frac{1}{2\pi f_{1}}\times\frac{1}{Z_{0,AS}} \tan\left (\frac{\pi l}{\lambda_{g}}\right),\end{equation}
\begin{equation} L_{s}=\frac{120\pi H(2.8-10\frac{R_{i}}{R_{o}})}{c\theta},\end{equation}
\begin{equation} C_{s}=\frac{\theta R_{o}^2 \epsilon _{r}}{240\pi Hc}.\end{equation} The next equations of (10) and (11) are obtained from [Reference Kwon, Lim and Kang17], where f 1 is the center frequency of the operating band, H is the total substrate height in mm, Ri is the inner radius, and Ro is the outer radius of the butterfly stub, c is the speed of light, θ is the spanning angle in radian. Using the design equations of (8)–(11) with considering the parasitic capacitance effects (
$C_{p1},C_{p2}$) between the radial stubs, the equivalent circuit is proposed in the operating frequency of 27–28.5 GHz. With the help of known parameters such as Ro, Ri, and spanning angle θ, the initial values of Ls and Cs can be calculated. Further, the circuit is tuned slightly to have better agreement between EM and circuit simulation as shown in Fig. 4(d). Next, the first butterfly stub is considered which is directly connected to the main RF line at the distance of l 1 and it is radial stub is an open circuit at the distance of R 0. The l 1 and R 0 are maintained to approximately odd multiple of 
$\lambda_{g}/4$, so that it behaves as open circuit for the main RF line [Reference Fooks and Zakarevicius18, Reference Majidifar and Hayati19 ]. Moreover, we added the other two butterfly stubs while maintaining the small gap of 
$l_{2}=1$ mm using the lossless line. Now, the series butterfly stubs are combined with the SICL line and the performance is shown in Fig. 5(a). The isolation graph is observed (
$|S_{13}|$), which varies with the spanning angle as shown in Fig. 5(b). The optimized spanning angle is chosen, 23∘ for the proposed duplexer circuit.
Figure 5. (a) Physical layout of the proposed RF isolation network (including three butterfly stubs) with SICL line. (b) Response of isolation between Ports 1 and 3 with the variation of spanning angle (θ).
I–V characteristics and S-parameter behavior of the diode model (MA4E1317)
Figure 6(a)–(c) shows diode model and its large signal model. The diode model of MA4E1317 is selected for the proposed SPDT switch. Figure 7(a) and (b) shows the I–V characteristics of diode model MA4E1317 with the temperature variation at forward and reverse bias, respectively. The physical model is composed of Schottky contact, Ohmic contact, Airbridge finger, cathode and anode contact pads and GaAs substrate. The large signal equivalent circuit model is created by the fringing field between both pads, which is modeled as a pad-to-pad capacitance, CPP. Next, Finger pad coupling is modeled as CFP, self-inductance of Airbridge finger modeled as LF, the contact pads are denoted as Cpad and Lpad. The diode Spice Model represents the Schottky junction, non-linear junction capacitance, and resistance [Reference Chen, Chen, Cai and Chen20]. The effects of full parasitic with spice model are analyzed from the I–V characteristics in Keysight ADS software.
Figure 6. (a) Top view of physical layout of MA4E1317. (b) Bottom View physical layout of MA4E1317. (c) Large signal equivalent circuit model of MA4E1317 (Schottky diode) with the parameters of 
$L_{pad}= 4.3$ pH, 
$C_{pad}= 4$ fF, 
$L_{f}= 0.28$ nH, 
$C_{PP}= 0.017$ pF, 
$C_{FP}= 0.016$ pF, 
$I_{s}= 0.12$ pA, 
$R_{s}= 3.15 \Omega$, N = 1.22, 
$C_{jo}= 0.02$ pF, M = 0.48, 
$I_{BV}=10\,\mu$A, 
$V_{j}= 0.67$ V, BV = 10 V.
Figure 7. (a) I–V characteristics of the diode (MA4E1317) in forward bias condition with different temperatures where 
$k_{1}= 0.44$ V, 
$k_{2}= 0.5$ V, 
$k_{3}= 0.6$ V. (b) I–V characteristics of the diode in reverse bias condition with different temperatures where 
$BV_{1}= 2.7$ V, 
$BV_{2}= 4.4$ V, 
$BV_{3}= 7$ V.
Working principle of SPDT switch as duplexer circuit
The SPDT switch as duplexer circuit consists of three port network device. It is operated with a diode ON and OFF state. In the duplexer circuit, when applying the DC bias condition such as forward voltage, 
$V_{1}=0.9$ V to diode D 1 and reverse voltage, 
$V_{2}=-4$ V to diode D 2. The diode D 1 is ON state and D 2 is OFF state, respectively. The diode D 2 is placed at a distance of 2λg from the junction. As a result, the impedance seen from the junction toward Port 3 becomes infinity and the RF signal only passes from Port 1 to Port 2. Similarly, when the DC bias condition is reversed (
$V_{2}=0.9$ V, 
$V_{1}=-4$ V), the diode D 2 is ON, and D 1 is OFF state, respectively. In the reverse bias condition, Port 2 behaves as an open circuit which allows the transmission of RF signal from Port 1 to Port 3.
Experimental results and discussion
Figure 8(a) and (b) shows the fabricated prototypes and responses of the SPDT circuit with the diodes (D 1 and D 1) model MA4E1317 [Reference Chen, Chen, Cai and Chen20] and capacitors (C 1, C 2, C 3, and C 4). The proposed duplexer circuit has been developed with a SICL to GCPW transition, which is applied on all ports for edge mount connector interfaces. Figure 9(a) and (b) present the simulated and measured results of the reflection coefficients, which is below −10 dB at the band, and insertion losses vary from 0.2 to 2.5 dB between Port 1 (Tx/Rx) and Port 2 (Tx) while maintaining the isolation’s 22–26 dB between Port 2 (Tx) and Port 3 (Rx) when D 1 is ON and D 2 is OFF state, respectively at 27–28.5 GHz. Similarly, Figure 10(a) and (b) presents the simulated and measured results for the reflection coefficients and insertion losses with the isolations maintained around 21–26 dB between Port 3 (Rx) and 2 (Tx) when D 1 is OFF state and D 2 is ON state, respectively at 27–28.5 GHz. The simulated results are validated with measured results in the frequency range of 27–28.5 GHz from Agilent N5234A Network Analyzer with DC supply HMP4030, where the measured results followed the simulated results with a slight deviation due to fabrication tolerance and connector loss.
Figure 8. Fabricated prototype of the proposed SPDT switch as duplexer circuit with important dimensions, 
$L_{1}= 0.85$ mm, 
$L_{2}= 2.7$ mm, 
$L_{3}= 5.2$ mm, 
$L_{4}=3.9$ mm, 
$L_{5}=3.4$ mm, 
$L_{6}=8.4$ mm, 
$P_{1}=0.62$ mm, 
$D_{1}=0.42$ mm, 
$S_{1}= 0.28$ mm, 
$A_{1}= 1.7$ mm, 
$W_{1}= 0.82$ mm. (a) Top view. (b) Bottom view.
Figure 9. (a) Performance of the duplexer circuit results in reflection coefficient (
$|S_{11}|$) and insertion loss (
$|S_{21}|$) from Tx/Rx to Tx channel. (b) Results of isolations (
$|S_{13}|$) and (
$|S_{23}|$) between Port 2 (Tx)–3 (Rx) and Port 1 (Tx/Rx)–3 (Rx) where 
$V_{1}=0.9$ V and 
$V_{2}=-4$ V.
Figure 10. (a) Performance of the duplexer circuit results in reflection coefficient (
$|S_{11}|$) and insertion loss (
$|S_{31}|$) from Tx/Rx to Tx channel. (b) Isolations (
$|S_{12}|$) and (
$|S_{32}|$) between Port 1 (Tx/Rx)–2 (Tx) and Port 2 (Tx)–3 (Rx) where 
$V_{1}=-4$ V and 
$V_{2}=0.9$ V.
Table 1 shows the comparisons of the proposed SPDT switch with the previous SPDT switches.
Table 1. Comparisons of the proposed SPDT switch with the previous SPDT switch’s
Tech: Technology, ML: Microstrip line, DGS: Defective ground structure, N.M: Not Mentioned, N.A: Not Applicable, RL: Return Loss, IL: Insertion Loss, 
$^{\#1}$Low-cost PCB technology, 
$^{\#2}$High-cost RFIC fabrication technology,
* Microwave frequency.
Conclusion
The design and development of the SPDT switch circuit for duplexer application are presented in this paper. The results obtained from simulation and measurement are in good agreement. The results of the SPDT switch exhibit less than 2 dB insertion loss in 27–27.9 GHz and less than 2.5 dB insertion loss in 27.9–28.5 GHz with better impedance matching in the transmit (Tx) and receive (Rx) channel from Tx/Rx channel. The proposed design is realized with a low-cost PCB design technique. It is suitable for millimeter wave active circuits and communication systems application.
Acknowledgements
The authors gratefully acknowledge SERB, Govt. of India under Grant S/SERB/SUM/20220113 and S/IIITB/SUM/20220120 for their financial support. We also acknowledge Dr S. Yadav, GWEC Ajmer, India, for providing measurement facilities.
Competing interests
The authors report no conflict of interest.
Saurabh Shukla received a master degree in integrated circuit and technology from the University of Hyderabad in 2016 and pursuing his Ph.D. degree in Electrical Engineering from Indian Institute of Technology, Jodhpur, India. His main research interests are design and realization of microwave/millimeter-wave based active circuits.
Soumava Mukherjee received his Ph.D. degree in electrical engineering at Indian Institute of Technology, Kanpur (IITK), India in 2016. He is currently an associate professor in electrical engineering, Indian Institute of Technology, Jodhpur, India. His research includes microwave/millimeter-wave based antennas, filters and active circuits.
