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Channel Layer Surface Modifications in a-Si:II thin Film Transistors With Oxide/Nitride Dielectric Layers

Published online by Cambridge University Press:  22 February 2011

S. S. He
Affiliation:
Departments of Physics, Electrical and Computer Engineering, and Materials Science and Engineering, North Carolina State University, Raleigh NC 27695–8202
D. J. Stephens
Affiliation:
Departments of Physics, Electrical and Computer Engineering, and Materials Science and Engineering, North Carolina State University, Raleigh NC 27695–8202
R. W. Hamaker
Affiliation:
Departments of Physics, Electrical and Computer Engineering, and Materials Science and Engineering, North Carolina State University, Raleigh NC 27695–8202
G. Lucovsky
Affiliation:
Departments of Physics, Electrical and Computer Engineering, and Materials Science and Engineering, North Carolina State University, Raleigh NC 27695–8202
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Abstract

We have fabricated normal and inverted staggered a-Si:H thin film transistors, TFTs, using silicon oxide/nitride double layer dielectrics. Significant improvements in the electrical performance of these TFTs have been obtained by integrating additional processingsteps into the usual processing cycles. These include; i) a pre-deposition nitridation ofthe a-Si:H surface for the top-gate devices, and ii) a post-deposition passivation of thea-Si:H surface (i.e., the back of the channel region) for the bottom-gate structures. Improvements in the electrical properties of the a-Si:H TFTs resulting from these additionalprocessing steps are discussed.

Type
Research Article
Copyright
Copyright © Materials Research Society 1993

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References

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