Hostname: page-component-77c89778f8-5wvtr Total loading time: 0 Render date: 2024-07-18T04:30:30.769Z Has data issue: false hasContentIssue false

Comparison of Amorphous and Polycrystalline Silicon Films as a Solid Diffusion Source for Advanced VLSI Processes

Published online by Cambridge University Press:  21 February 2011

K. Park
Affiliation:
The University of Texas, Austin, TX
S. Batra
Affiliation:
The University of Texas, Austin, TX
S. Banerjee
Affiliation:
The University of Texas, Austin, TX
G. Lux
Affiliation:
Charles Evans & Associates, Redwood City, CA
Get access

Abstract

This paper discusses the diffusion behavior of P, B and As from as-deposited amorphous/ polycrystalline silicon into the underlying Si substrate as a function of RTA/ furnace annealing conditions. The evolution of grain microstructure has been studied in as-deposited amorphous/ polycrystalline silicon to determine the inter-dependency of diffusion behavior and grain microstructure. After 60 s RTA at 1100° C for P doping, the microstructure of asdeposited amorphous silicon is drastically changed by rapid grain growth, whereas it is only slightly changed for asdeposited polysilicon. This leads to formation of deeper junctions for as-deposited polysilicon than for as-deposited amorphous Si. For B doping, there is little difference in the final microstructure between as-deposited polysilicon and as-deposited amorphous silicon after anneal. For low annealing temperatures, the junctions for both amorphous and polysilicon diffusion sources are laterally uniform in spite of local inhomogeneities due to grain boundaries. This is believed to be due to the rapid lateral spread of dopants along the interface prior to indiffusion into the substrate. At high annealing temperatures, a number of dark fringes are observed in the substrate along the interface from Crosssectional Transmission Electron Microscopy (XTEM) micrographs, which are more conspicuous for as-deposited amorphous Si. We believe that these fringes arise from local doping inhomogeneities or lattice strain in the substrate. For 30 s RTA at 1150° C, the native interfacial oxide appears to break up, causing epitaxial alignment of the polysilicon layer with respect to the underlying substrate.

Type
Research Article
Copyright
Copyright © Materials Research Society 1990

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

1. Wong, S.S., Bradbury, D.R., Chen, D.C., and Chiu, K.Y., in IEDM Tech. Dig., pp. 634, 1984.Google Scholar
2. Pattern, G.L., Bramen, J.C., Plummer, J.D., IEEE Trans. Electron Devices, ED-33, pp. 1754, 1986.10.1109/T-ED.1986.22738Google Scholar
3. Becker, F.S., Oppolzer, H., Weitzel, I., Eichermolller, H., and Schaber, H., J. Appl. Phys., 56, pp. 1233, 1984.10.1063/1.334057Google Scholar
4. Swaminathan, B., Saraswat, K.C., and Dutton, R.W., Appl. Phys. Lett., 40, pp. 795, 1982.10.1063/1.93263Google Scholar
5. Kinsborn, E., Sternheim, M., and Knoell, R., Appl. Phys. Lett., 42, pp. 835, 1983.10.1063/1.94080Google Scholar
6. Iverson, R.B. and Reif, R., J. Appl. Phys., 62, pp. 1675, 1987.10.1063/1.339591Google Scholar
7. Ktlster, U., Phys. Stat. Sol. (a) 48, pp. 313, 1978.Google Scholar
8. Zellama, K., Germain, P., Squelard, S., Bourgoin, J.C., and Thomas, P.A., J. Appl. Phys., 50, pp. 6995, 1979.10.1063/1.325856Google Scholar
9. Mei, L., Rivier, M., Kwark, Y., and Dutton, R.W., J. Electrochem. Soc., 129, pp. 1791, 1982.10.1149/1.2124295Google Scholar
10. Park, K., Batra, S., and Banerjee, S., this Materials Research Society Symposium (to be published).Google Scholar
11. Roberts, M.C., Yallup, KJ., and Booker, G.R., in “Microscopy of Semiconducting Materials 1985”, Cullis, A.G. and Holt, D.B., Editors, pp. 483, Institute of Physics Conference Series no.76, England 1985.Google Scholar