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Compound Sidewall Spacer Technology for Submicron Mosfet
Published online by Cambridge University Press: 22 February 2011
Abstract
This work describes process development of various kinds of compound sidewall spacer in submicron CMOS technology to improve gate oxide (GOX) leakage characteristics. This is attained by minimizing the impact of gate-level defects (GLDs) caused by in-process particle incorporation. Transistor characteristics did not suffer from this new sidewall spacer process.
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- Copyright © Materials Research Society 1993
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