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Experimental and Theortical Results on the Performance of Elementary Amorphous Silicon thin film Integrated Circuits

Published online by Cambridge University Press:  26 February 2011

M. Böwg ,
S. Salamon  and
Z. Kiss
M. Böwg
Affiliation:
Chronar Corp., P.O. Box 177, Princeton, New Jersey 08542, USA
S. Salamon
Affiliation:
Chronar Corp., P.O. Box 177, Princeton, New Jersey 08542, USA
Z. Kiss
Affiliation:
Chronar Corp., P.O. Box 177, Princeton, New Jersey 08542, USA
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Abstract

Elementary amorphous silicon logic integrated circuits have been manufactured on glass substrates by rf glow discharge. Circuits presented include two different inverters, a 6-transistor addressable static memory cell, a 3-transistor addressable dynamic memory cell, and a 9-stage ring oscillator. All of the circuits use n-channel enhancement type load TFTs instead of ohmic resistors. The channel length of the driver transistors is 10 μn and 15 μm, experimental geometry ratios range from β=5 to β=33 The influence of the geometry ratio on static and dynamic characteristics is examined. Circuits operating at supply voltages of less than 5 V have been demonstrated.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 118: Symposium E – Amorphous Silicon Technology , 1988 , 243
Copyright
Copyright © Materials Research Society 1988

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