Hostname: page-component-84b7d79bbc-fnpn6 Total loading time: 0 Render date: 2024-08-01T18:34:33.190Z Has data issue: false hasContentIssue false

Molybdenum Gate Electrode Technology For Deep Sub-Micron CMOS Generations

Published online by Cambridge University Press:  21 March 2011

Pushkar Ranade
Affiliation:
Department of Materials Science and Engineering Department of Electrical Engineering and Computer Sciences University of California at Berkeley, Berkeley, CA 94720, USA
Get access

Abstract

Continued scaling of CMOS technology beyond the 100 nm technology node will rely on fundamental changes in transistor gate stack materials [1]. Refractory metals and their metallic derivatives are among the only candidates suitable for use as transistor gate electrodes. In earlier publications, Mo has been proposed as a potential candidate for use as a MOSFET gate electrode and the implantation of nitrogen ions into the Mo film has been observed to lower the interfacial work function of Mo [2,3]. This observation indicates the potential application of Mo as a CMOS gate electrode. In this paper, the dependence of the interfacial work function on the nitrogen implant parameters (viz. energy and dose) is discussed. In general, metal work functions at dielectric interfaces depend on the permittivity of the dielectric [3,4,5]. This dependence of the gate work function on dielectric permittivity presents a significant challenge for the integration of metal gate electrodes into future CMOS technology. In light of this, the ability to engineer the Mo gate work function over a relatively large range makes it an attractive candidate for this application.

Type
Research Article
Copyright
Copyright © Materials Research Society 2001

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

1. International Technology Roadmap for Semiconductors, Semiconductor Industry Association, 1999 Google Scholar
2. Ranade, P., Yeo, Y.-C., Lu, Q., Takeuchi, H., King, T.-J., Hu, C., Symposium Proceedings, Materials Research Society Spring 2000 Symposium, Gate Stack and Silicide Issues in Silicon Processing, v. 611, C3.2.1 Google Scholar
3. Lu, Q. et al, 2000 International Electron Devices Meeting, Technical Digest, IEEE, pp. 641 Google Scholar
4. Yeo, Y.-C., Ranade, P., Lu, Q., Lin, R., King, T.-J., Hu, C., 2001 Symposium on VLSI Technology, IEEE, 2001, (in press)Google Scholar
5. Keller, R. C. and Helms, C. R., J. Vacuum Science and Technology (A), 10(4), Jul/Aug 1992, pp. 775 Google Scholar
6. Matsuhashi, H. and Nishikawa, S., Japan J. Appl. Phys., v 33, (3A), 1994, pp. 1293 Google Scholar
7. De, I., Johri, D., Srivastava, A., Osburn, C. M., Solid-State Electronics, vol.44, (no.6), June 2000, pp.1077 Google Scholar
8. Nicollian, E.H. and Brews, J.R., MOS Physics and Technology, John Wiley and Sons, New York, 1982 Google Scholar
9. Michaelson, H. B., J. Appl. Physics, v. 48, no.11, November 1977, pp. 4729 Google Scholar
10. Chang, L., Tang, S., King, T.-J., Bokor, J. and Hu, C., 2000 International Electron Devices Meeting, Technical Digest, IEEE, pp. 719 Google Scholar