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P Channel Mosfet Devices in Nanocrystalline Silicon

Published online by Cambridge University Press:  01 February 2011

Durga Panda ,
Max Noack  and
Vikram Dalal
Max Noack
Affiliation:
noackmax@iastate.edu, Iowa State University, Microelectronics Research Ctr, ASC1, Ames, Iowa, 50011, United States
Vikram Dalal
Affiliation:
vdalal@iastate.edu, Iowa State University, Electrical and Comp. Engr., Coover Hall, Ames, Iowa, 50011, United States
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Abstract

We report on the growth and properties of p-channel nanocrystalline Si thin film transistor (TFT) devices. In contrast to previous work, the devices are fabricated in n-body nanocrystalline Si. The doping of the n-body is systematically changed by doping with ppm levels of phosphorous. The threshold voltage was found to change systematically as phosphorus content increased. The TFT devices are of the bottom-gate type, grown on oxidized Si wafers. Source and drain contacts were provided by using either plasma grown p type nanocrystalline layers, or by the simple process of Al diffusion. A top layer of plasma-deposited silicon dioxide was found to decrease the off current significantly. High on-off current ratios exceeding 106 were obtained. Hole mobilities in the devices were consistently good, with the best mobility being in the range of ~1.3 cm2/V-s.

Keywords

Sisemiconductingelectronic material
Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 910: Symposium A – Amorphous and Polycrystalline Thin-Film Silicon Science and Technology – 2006 , 2006 , 0910-A22-07
Copyright
Copyright © Materials Research Society 2006

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