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Polysilicon High-Voltage TFT with Field-Plate-Controlled Offset Region

Published online by Cambridge University Press:  21 February 2011

T. Y. Huang ,
I. W. Wu ,
A. G. Lewis ,
A. Chiang  and
R. H. Bruce
T. Y. Huang
Affiliation:
Electronics & Imaging Laboratory, Xerox Palo Alto Research Center 3333 Coyote Hill Rd., Palo Alto, CA 94304
I. W. Wu
Affiliation:
Electronics & Imaging Laboratory, Xerox Palo Alto Research Center 3333 Coyote Hill Rd., Palo Alto, CA 94304
A. G. Lewis
Affiliation:
Electronics & Imaging Laboratory, Xerox Palo Alto Research Center 3333 Coyote Hill Rd., Palo Alto, CA 94304
A. Chiang
Affiliation:
Electronics & Imaging Laboratory, Xerox Palo Alto Research Center 3333 Coyote Hill Rd., Palo Alto, CA 94304
R. H. Bruce
Affiliation:
Electronics & Imaging Laboratory, Xerox Palo Alto Research Center 3333 Coyote Hill Rd., Palo Alto, CA 94304
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Abstract

An improved polysilicon high voltage thin film transistor (HVTFT) structure with field-plate-controlled offset region (FP-HVTFT) is proposed for eliminating the current-pinching phenomena often observed in the conventional offset-gate polysilicon HVTFTs. The new metal field plate serves, in lieu of ion implantation, to control the conductivity of the offset region. By properly biasing the field plate to distribute the drain electric field at both ends of the offset region, high-voltage operation of up to 100 V, suitable for many large-area applications, is achieved. Good turn-on characteristics without current-pinching effects are consistently obtained. Moreover, the new FP-HVTFT also eliminates the lightly-doped-drain implant normally required in conventional offset-gate HVTFTs, resulting in a simpler and more reproducible process flow.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 182: Symposium C – Polysilicon Thin Films and Interfaces , 1990 , 387
Copyright
Copyright © Materials Research Society 1990

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References

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