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Study of Fatigue Behavior of 300 nm Damascene Interconnect Using High Amplitude AC Tests*

Published online by Cambridge University Press:  01 February 2011

David T. Read ,
Roy Geiss  and
Glenn Alers
David T. Read
Affiliation:
read@boulder.nist.gov, National Institute of Standards and Technology, Materials Reliability Division, Mail Stop 853.05, 325 Broadway, Boulder, CO, 80305-3328, United States, 3034973853, 3034975030
Roy Geiss
Affiliation:
geiss@boulder.nist.gov, National Institute of Standards and Technology, Boulder, CO, 80305, United States
Glenn Alers
Affiliation:
galers@ucsc.edu, University of California at Santa Cruz, Santa Cruz, CA, 95064, United States
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Abstract

The AC fatigue test technique, which uses cyclic joule heating to apply thermal cycles to thin-film structures, was applied to copper lines and vias in damascene dielectric structures on silicon substrates. Specimen chips with two different types of dielectric, oxide and low-k, were tested. The lines were 300 nm wide; various via widths were tested. At 100 Hz, cyclic temperature ranges from 400 to 900 °C produced line lifetimes between 10 and 1 million seconds. Similar lifetimes were reached in the vias for temperature ranges between 100 and 500 °C. The data were plotted as number of load reversals to failure against cyclic temperature range; the data trends for the two different types of dielectric were indistinguishable. When the line data were fit to the Basquin equation for mechanical fatigue, the temperature ranges for both dielectrics at the one1-reversal intercept were above 1000 °C. The via data were more scattered, but trended toward a lower intercept temperature.

Keywords

Cufatiguethermal stresses
Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 990: Symposium B – Materials, Processes, Integration and Reliability in Advanced Interconnects for Micro- and Nanoelectronics , 2007 , 0990-B09-09
Copyright
Copyright © Materials Research Society 2007

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References

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