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Surface Morphology and Electronic Properties of ErSi2

Published online by Cambridge University Press:  15 February 2011

C. S. Wu
Affiliation:
Department of Electrical Engineering and Computer Sciences, University of California, San Diego, La Jolla, CA 92093, (U.S.A.)
S. S. Lau
Affiliation:
Department of Electrical Engineering and Computer Sciences, University of California, San Diego, La Jolla, CA 92093, (U.S.A.)
T. F. Kuech*
Affiliation:
California Institute of Technology, Pasadena, CA 91125, (U.S.A.)
B. X. Liu*
Affiliation:
California Institute of Technology, Pasadena, CA 91125, (U.S.A.)
*
Present address: Department of Electrical Engineering, Massachusetts Institute of Technology, Cambridge, MA 02139, U.S.A.
Present address: Department of Electrical Engineering, Massachusetts Institute of Technology, Cambridge, MA 02139, U.S.A.
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Abstract

The surface of ErSi2, formed by the reaction of thin erbium layers with a singlecrystal silicon substrate, is typically dominated by deeply penetrating regularly shaped pits. These pits are shown to have detrimental effects on the electronic performance of Schottky barrier diodes. Surface pits may be reduced in density or eliminated entirely (i) by the use of silicon substrate surfaces prepared under ultrahigh vacuum conditions prior to metal deposition, (ii) by means of ion irradiation techniques or (iii) by reacting erbium with an amorphous silicon (a-Si) layer. In this investigation, planar ErSi2 layers (pit free) are made using the third approach with a sample structure of a-Si/Er/c-Si where c-Si denotes crystalline silicon. The fast reaction between a-Si and erbium leads to a planar sample structure of ErSi2/c-Si with little or no reaction between erbium and the c–Si substrate. The electronic performance of pit–free ErSi2 diodes made in this manner is shown to be much superior to that of diodes made by reacting erbium with silicon substrates.

Type
Research Article
Copyright
Copyright © Materials Research Society 1982

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References

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