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A Totally Wet Etch Fabrication Technology for Amorphous Silicon Thin Film Transistors

Published online by Cambridge University Press:  15 February 2011

Amir Masoud Miri  and
Savvas G. Chamberlain
Amir Masoud Miri
Affiliation:
University of Waterloo, Department of Electrical and Computer Engineering, Waterloo, Ontario Canada N2L 3G1.
Savvas G. Chamberlain
Affiliation:
University of Waterloo, Department of Electrical and Computer Engineering, Waterloo, Ontario Canada N2L 3G1.
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Abstract

We developed a totally wet etch processing technology for the fabrication of inverted staggered amorphous silicon thin-film transistors (TFTs) and circuits. In this technology we take advantage of highly etch selective KOH and HF base solutions for amorphous silicon and silicon nitride layers. Our technology is simple, reproducible, fully compatible with positive photo-resist lithography techniques, and suitable for mass production of amorphous silicon TFT based circuits. Using this process, we fabricated thin film transistors which have an effective mobility of 0.83 cm2 V−1 s−1, threeshold voltage of 2V and on/off current ratio of 107. In this paper we discuss the details of our fabrication process and report on the chemical conditions of the etching and deposition processes.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 377: Symposium A – Amorphous Silicon Technology 1995 , 1995 , 737
Copyright
Copyright © Materials Research Society 1995

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References

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