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Materials Limitations in the Higher Electronic Packaging Levels

Published online by Cambridge University Press:  21 February 2011

C. A. Neugebauer
C. A. Neugebauer*
Affiliation:
General Electric Corporate Research & Development P.O. Box 8, KWC-1605, Schenectady, New York 12301
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Extract

Microminiaturization is desirable for reasons of lower cost, lower volume and weight, higher performance, and higher reliability. Microminiaturization is best achieved by downscaling the feature sizes on the chip itself, and this indeed continues to be the major driving force in the electronics revolution. It is normally cheaper, weighs less, is faster, and is more reliable to put as much of a system's interconnection effort on the chip itself (i.e., packaging level 0). Costs increase steeply for interconnections on the higher levels.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 108 , 1987 , 13
Copyright
Copyright © Materials Research Society 1988

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References

REFERENCES

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