Interest is widespread in flexible thin-film transistor backplanes made on clear polymer foil, which could be universally employed for a variety of applications. All ultralow process temperatures, plastic compatible thin film transistor (TFT) technologies battle short or long term device instabilities. The quality and stability of amorphous silicon thin-film transistors (a-Si:H TFTs) improves with increasing process temperature. TFT stacks deposited at less than 250°C by radio frequency plasma enhanced chemical vapor deposition (RF-PECVD) exhibit higher threshold voltage shifts after gate bias stressing than stacks deposited at ∼300°C in the active matrix liquid-crystal display (AMLCD) industry [1]. Therefore, optically clear plastic (CP) substrates are desired that tolerate high process temperatures. The first step in a-Si:H TFT fabrication on a polymer is the deposition of a planarizing barrier and adhesion layer. For this purpose we have been using silicon nitride (SiNx) grown by PECVD.

This paper discusses the substrate preparation and SiNx deposition for the process temperature of 250°C. We study the mechanical strain in the SiNx film on the CP substrate, as a function of RF power. Earlier work has shown that SiNx films deposited at low RF power are under tensile strain, and become increasingly compressed as the deposition power is raised [2]. Additionally, at very high deposition power the substrate is bombarded at the beginning of film growth to achieve good film adhesion. The goal is to identify the correct processing conditions at which the total mismatch strain between the film and the substrate is minimized, to keep the film/substrate composite flat and avoid mechanical fracture as well as peeling due to poor adhesion. Optimal deposition conditions were identified to obtain crack-free SiNx barrier layers. The barrier layers were tested by fabricating a-Si:H TFTs on them at 250°C.