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SONOS Memories: Advances in Materials and Devices

Published online by Cambridge University Press:  06 February 2017

K. Ramkumar*
Affiliation:
Cypress Semiconductor, 3833 North First St, San Jose, CA 95134, U.S.A.
V. Prabhakar
Affiliation:
Cypress Semiconductor, 3833 North First St, San Jose, CA 95134, U.S.A.
Ali Keshavarzi
Affiliation:
Cypress Semiconductor, 3833 North First St, San Jose, CA 95134, U.S.A.
Igor Kouznetsov
Affiliation:
Cypress Semiconductor, 3833 North First St, San Jose, CA 95134, U.S.A.
Sam Geha
Affiliation:
Cypress Semiconductor, 3833 North First St, San Jose, CA 95134, U.S.A.
*
*(Email: ktr@cypress.com)
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Abstract

Silicon Nitride based charge trap devices have been studied since the 1980s for applications in non-volatile memories. Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) stack as the non-volatile memory gate stack has been the focus since the 1990s. Several enhancements in SONOS layer materials have been invented to reduce the programming voltage and improve the reliability of the SONOS memory. SONOS memories are a widely used class of non-volatile memories today. This paper will review the history of SONOS and highlight the various innovations that have enhanced SONOS memory performance, reliability and low cost of manufacture. Topics covered include various improvements in the SONOS stack such as Band gap engineering, High K–Metal Gate for SONOS, 3D SONOS, SONOS FinFETs (Field Effect Transistor) and embedded SONOS.

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Articles
Copyright
Copyright © Materials Research Society 2017 

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References

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