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0.35 μm Technologies in Japan

Published online by Cambridge University Press:  15 February 2011

Takamaro Kikkawa  and
Isami Sakai
Takamaro Kikkawa
Affiliation:
ULSI Device Development Laboratories, NEC Corporation 1120 Shimokuzawa, Sagamihara City, 229 Japan
Isami Sakai
Affiliation:
ULSI Device Development Laboratories, NEC Corporation 1120 Shimokuzawa, Sagamihara City, 229 Japan
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Abstract

This paper describes silicide and salicide technologies in Japan for 0.35 μm CMOS ULSIs and beyond. Polycide gate electrodes have been developed for CMOS devices from 1.0 μm to 0.35 μm design rule regime, in which Wsi2 has been used dominantly as a silicide gate material. On the other hand, silicide films are formed selectively on source/drain diffusion layers by salicide techniques, in which TiSi2 is used as a salicide material. TiSi2 is also used as a salicide material of both gate electrodes and source/drain diffusion layers for dual gate (n+/p+) CMOS. The TiSi2 thin film is formed by Ti sputtering and subsequent rapid thermal annealing. A preamorphization technique before Ti sputtering has been developed to obtain equal silicide properties on p+ and n+ diffusion layers. A high-temperature Ti sputtering technique has been developed in conjunction with pre-amorphization. CoSi2 and NiSi have also been developed as salicide materials for quartermicron CMOS and beyond.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 402: Symposium H – Silicide Thin Films-Fabrication, Properties and Applications , 1995 , 199
Copyright
Copyright © Materials Research Society 1996

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References

[1] Lasky, J. B., Nakos, J.S., Chain, O.J. and Geiss, P. J., IEEE Trans. ED–38(2), 262, (1991).Google Scholar
[2] Jeon, H., Sukow, C.A., Honeycutt, J. W., Rozgonyi, G. A., and Nemanich, R. J., J. Appl. Phys. 71, 4269 (1992).Google Scholar
[3] Fujii, T., Hashimoto, S. and Hori, T., 1994 Symp. VLSI Technol. Dig. Tech. Papers, (IEEE, New York, 1994) p. 117.Google Scholar
[4] Hayashida, H., Toyoshima, Y., Suizu, Y., Mitsuhashi, K., Iwai, H. and Maeguchi, K., 1987 Symp VLSI Technol. Dig. Tech. Papers (IEEE, New York, 1987) p. 29.Google Scholar
[5] Sakai, I., Abiko, H., Kawaguchi, H., Harashima, T., Johanssen, L.E.G. and Okabe, K., 1992 Symp. VLSI Technol. Dig. Tech. Papers (IEEE, New York, 1992) p. 66.Google Scholar
[6] Inoue, K., Fujii, K., Mikagi, K. and Kikkawa, T., NEC Journal of Research and Development, 36(1), 114 (1995).Google Scholar
[7] Fujii, K., Kikuta, K. and Kikkawa, T., Symp. VLSI Technol. Dig. Tech. Papers (IEEE, New York, 1995) p.57.Google Scholar
[8] Kotaki, H., Mitsuhashi, K., Takagi, J., Akagi, Y. and Koba, M., Extended Abst. 1992 Conf. Solid-State Devices and Materials (Japan Society of Applied Physics, Tokyo, 1992) p. 102.Google Scholar
[9] Mogami, T., Wakabayashi, H., Saito, Y., Matsuki, T., Tatsumi, T. and Kunio, T., Int. Electron Devices Meeting (IEEE, New York, 1994) p.687.Google Scholar
[10] Goto, K., Yamazaki, T., Fushida, A., Inagaki, S., Yagi, H., Symp. VLSI Technol. Dig. Tech. Papers (IEEE, New York, 1994) p. 119.Google Scholar
[11] Ogawa, S., Fair, J.A., Dass, M.L.A., Jones, E.C., Kouzaki, T., Cheung, N.W. and Fraser, D.B., Ext. Abst. Conf. Solid-State Devices and Materials (Japan Society of Applied Physics, Tokyo, 1993) p. 195.Google Scholar
[12] Ohguro, T., Nakamura, S., Koike, M., Morimoto, T., Nishiyama, A., Ushiku, Y., Yoshitomi, T., Ono, M., Saito, M. and Iwai, H., IEEE Trans. ED–41 (12), 2305 (1994).Google Scholar
[13] Sekine, M., Inoue, K., Ito, H., Homma, I., Miyamoto, H., Yoshida, K., Watabnabe, H., Mikagi, K., Yamada, Y. and Kikkawa, T., Int. Electron Devices Meeting (IEEE, New York, 1994) p.493.Google Scholar
[14] Kasai, K., Akasaka, Y., Nakajima, K., Suehiro, S., Suguro, K., Oyamatsu, H., Kinugawa, M. and Kakumu, M., Int. Electron Devices Meeting (IEEE, New York, 1994), p.93.Google Scholar