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Published online by Cambridge University Press: 22 February 2011
Current-voltage and conductance-voltage characterization is used to study high bias related “positive charge” in MOS tunnel diodes fabricated on p-type substrates. This charge effect appears to be associated with interface state levels that are located both throughout the band gap, and at a well-defined energy level roughly 0.3 eV above the silicon valence band edge. The well-defined state apparently acts as a tunnelingcenter communicating with the gate electrode and the silicon valence band. In addition, the first observation of high bias related charge is reported for tunnel diodes built on n-type substrates. This charge has positive character at low bias levels, transforming to net negative charge at high gate voltages.