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Nickel Silicide Work Function Tuning Study In Metal-Gate CMOS Applications

Published online by Cambridge University Press:  26 February 2011

Jun Yuan
Affiliation:
Electrical Engineering Department, University of California, Los Angeles, CA, 90095
Grant Z. Pan
Affiliation:
Electrical Engineering Department, University of California, Los Angeles, CA, 90095
Yu-Lin Chao
Affiliation:
Electrical Engineering Department, University of California, Los Angeles, CA, 90095
Jason C.S. Woo
Affiliation:
Electrical Engineering Department, University of California, Los Angeles, CA, 90095
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Abstract

Mid-gap work function (∼4.7eV) for mono-nickel-silicide (NiSi) was obtained by extrapolating flat band voltages of metal-oxide-semiconductor (MOS) capacitors with different gate oxide thickness. Both silicidation temperature and time can affect the nickel silicide work function as a result of different Ni:Si ratio close to the gate oxide interface. Arsenic implantation into the polysilicon before silicidation can shift the NiSi work function towards the silicon conduction band, which makes it suitable for high performance NMOS applications. The physical mechanism responsible for this work function shift is arsenic pile-up at the oxide interface during the nickel silicidation process. Therefore, dual work function metal gate can be obtained by using a single gate full silicidation process. Silicidation temperature and time also affect the work function shift from arsenic dopant, and the incomplete gate silicidation can have the maximum work function modification effect. Arsenic activation temperature before silicidation was found to have a significant effect on the work function shift. Un-annealed samples exhibit a minimum shift in work function due to the low dopant pile-up concentration at the oxide interface.

Type
Research Article
Copyright
Copyright © Materials Research Society 2005

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References

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