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Reliability Study of Plasma Etching Damage in ULSI Process

Published online by Cambridge University Press:  22 February 2011

Xiao-Yu Li ,
Jen-Tai Hsu ,
Paul Aum ,
Vivek Bissessur ,
David Chan  and
C.R. Viswanathan
Xiao-Yu Li
Affiliation:
Department of Electrical Engineering, University of California, Los Angeles, CA 90024
Jen-Tai Hsu
Affiliation:
Department of Electrical Engineering, University of California, Los Angeles, CA 90024
Paul Aum
Affiliation:
SEMATECH, Austin, TX 78741-6499
Vivek Bissessur
Affiliation:
SEMATECH, Austin, TX 78741-6499
David Chan
Affiliation:
SEMATECH, Austin, TX 78741-6499
C.R. Viswanathan
Affiliation:
Department of Electrical Engineering, University of California, Los Angeles, CA 90024
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Abstract

Plasma etching can cause damage in gate oxide during ULSI processing. The damage in the oxide is believed to arise through a high field induced stress current. However, there is another type of damage which is due to ion and photon bombardment on the edge of poly-Si gate during the plasma etching. These two damage mechanisms impose different reliability problems. One is hot-carrier(HC) stress and the other is Fowler-Nordheim(F-N) stress. MOS devices with special test structures to assess plasma process damage were fabricated using 0.35 μm CMOS technology. The devices with different poly gate antennas and etching through different poly-Si gate etching conditions were studied using SEM and various electrical techniques. It was found that oxide charging damaged device is more susceptible to F-N type of stress while ion and photon bombardment damaged device is more susceptible to HC type of stress.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 338: Symposium – Materials Reliability in Microelectronics IV , 1994 , 51
Copyright
Copyright © Materials Research Society 1994

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References

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