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Ti/TiN Barrier Improvement for VLSI Metallization

Published online by Cambridge University Press:  10 February 2011

Chun-Cho Chen
Affiliation:
Process Engineering Department / Fab II Winbond Electronics Corp., Hsinchu, Taiwan, R.O.C.
Jay L. C. Chao
Affiliation:
Process Engineering Department / Fab II Winbond Electronics Corp., Hsinchu, Taiwan, R.O.C.
K. C. Wang
Affiliation:
Process Engineering Department / Fab II Winbond Electronics Corp., Hsinchu, Taiwan, R.O.C.
Eric Chiang
Affiliation:
Process Engineering Department / Fab II Winbond Electronics Corp., Hsinchu, Taiwan, R.O.C.
J. J. Hsu
Affiliation:
Process Engineering Department / Fab II Winbond Electronics Corp., Hsinchu, Taiwan, R.O.C.
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Abstract

In this study deposition temperature and post-deposition treatments, such as vacuum break, furnace anneal and RTA, were coupled together to improve Ti/TiN barrier properties. Raising substrate temperature during deposition resulted in lower sheet resistance and stresses, but worse Sheet resistance (Rs) uniformity, suggesting larger-grain growth and non-uniform silicidation. The RTA treatment appeared to be the most effective one to improve barrier integrity due to high temperature densification and oxygen rich along grain boundaries. To include contact geometry effect, the barrier processes were incorporated with hot Al on the contact level of 0.6µm SRAM. After alloying at 430°C for 45 min, the yields turned out to be similar, although the RTA treatment resulted in lower P+ contact resistance, implying more complete activation, silicidation and less dopant segregation. The result suggests that it is feasible to deposit Ti/TiN insitu with hot Al process to enhance throughput. The yield result after a second alloying set at 500°C for 30 min showed that RTA treated Ti/TiN was the only one to survive.

Type
Research Article
Copyright
Copyright © Materials Research Society 1996

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References

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