We survey interconnection networks that link the processors in a parallel computer. Important terms and design issues pertaining to networks are also briefly discussed. This chapter is intended to be concise and sufficiently complete.

Introduction

The interconnection network in a multiprocessor specifies how the processors are tied together. The processors then communicate by sending information through the network. Since the interprocessor delay easily dominates the execution time [56] except where interprocessor communications are rare or only nearly processors exchange information, the choice of the network makes the difference between an efficient system and an inefficient one; clearly, a network where information has to traverse, say, 100 links on the average is less efficient than the one where only ten suffice, other things being equal. Besides the efficiency issue, the interconnection network also sets a limit to the number of faults a parallel computing system can sustain. For example, since a disconnected network that isolates some processors from the others makes joint computation impossible, the network should be able to withstand many faulty links.

This chapter surveys interconnection networks and related issues. In Section 3.2 some of the basic terms for networks are reviewed. A simple and useful graph- theoretical abstraction of networks is introduced in Section 3.3. Several popular networks are then briefly surveyed in Section 3.4, followed by Section 3.5, where some key issues in the choice of networks are summarized.