In this chapter we discuss the two field effect transistors (FETs) that utilize either p–n junctions or Schottky barriers to provide gating action. These devices are junction field effect transistors, JFETs, and metal semiconductor field effect transistors, MESFETs. Both types of device are based on the field effect, except that they use different mechanisms to provide gating action. In the field effect, the conductivity of the underlying semiconductor can be altered by the presence of an electric field, in this case, produced by the application of a gate bias voltage. The gate typically lies on the top of the device and thus the conductivity can be controlled from the top of the device, making the contacting of the device relatively straightforward. For this reason high levels of integration have been achieved using field effect devices. The most important of these devices is the metal oxide semiconductor field effect transistor, MOSFET, which will be discussed in detail in Chapter 6.

JFET operation

A JFET uses two p–n junctions on the top and bottom of the device as gates as shown in Fig. 5.1. The top and bottom gates are biased in the same manner. Notice that the gate p–n junctions are p+–n junctions. Thus most of the depletion region width forms within the more lightly doped n-region rather than the p+-region. The depletion regions from the top and bottom gates encroach on the conducting channel formed in the n-type material between the two gates.