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Chapter 15 - Outlook

Hubert Kaeslin
Affiliation:
ETH Zürich
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Summary

The driving force behind the rapid expansion of the microelectronics industry is its aspiration to offer ever more powerful circuits at lower unit prices. From different perspectives, sections 15.1 through 15.4 attempt to find out how and for how long this trend may be expected to continue into the future. The impact of the galloping progress of semiconductor fabrication technology on VLSI design practices is discussed in section 15.5.

Evolution paths for CMOS technology

During the past decades, microelectronics has continuously and rapidly evolved according to the motto “smaller, faster, cheaper”. The reason why this has been possible is the scaling property of CMOS technology first stated by Robert Dennard and his colleagues in 1972 [414]. They observed that MOSFETs would continue to behave largely in the same way provided their geometric dimensions and voltage levels could be made to shrink in a linear fashion so as to maintain constant electric fields, see fig.15.1. Better still, they predicted that key figures of merit like gate delay and energy efficiency would greatly benefit from downscaling. The question is

“For how long can CMOS scaling continue and where does this trend lead to?”

Classic device scaling

The driving force behind moving from one process generation to the next is to lower fabrication costs per device and per circuit by shrinking geometries so as to obtain more paying circuits from a wafer of some given diameter.

Type
Chapter
Information
Digital Integrated Circuit Design
From VLSI Architectures to CMOS Fabrication
, pp. 706 - 731
Publisher: Cambridge University Press
Print publication year: 2008

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  • Outlook
  • Hubert Kaeslin, ETH Zürich
  • Book: Digital Integrated Circuit Design
  • Online publication: 05 November 2012
  • Chapter DOI: https://doi.org/10.1017/CBO9780511805172.016
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  • Outlook
  • Hubert Kaeslin, ETH Zürich
  • Book: Digital Integrated Circuit Design
  • Online publication: 05 November 2012
  • Chapter DOI: https://doi.org/10.1017/CBO9780511805172.016
Available formats
×

Save book to Google Drive

To save content items to your account, please confirm that you agree to abide by our usage policies. If this is the first time you use this feature, you will be asked to authorise Cambridge Core to connect with your account. Find out more about saving content to Google Drive.

  • Outlook
  • Hubert Kaeslin, ETH Zürich
  • Book: Digital Integrated Circuit Design
  • Online publication: 05 November 2012
  • Chapter DOI: https://doi.org/10.1017/CBO9780511805172.016
Available formats
×