The phase-locked loop (PLL) concept is about 70 years old and a wealth of literature is already available on the subject. Someone may therefore ask why another book about PLLs.

The first reason is related to the specific application considered here, namely the silicon integration of frequency synthesizers. Classical texts do not deal in depth with issues related to the design of frequency synthesizers in modern transceivers. In particular, the design guidelines and the performance of some important building blocks and their impact on the whole system are sometimes barely mentioned. The attempt, here, has been instead to provide a broad description of the most typical circuit topologies of voltage-controlled oscillators, frequency dividers and phase and frequency detectors, and to discuss their performance in terms of power consumption, phase noise, spurs, and so forth. A chapter is also devoted to integrated passive components, such as varactors and inductors, since the ability to optimize their performance judiciously is becoming a key skill required of the RF designer.

The second reason is that the book attempts to provide an alternative approach to PLL theory and design. After years of research and study on the subject, the authors propose an analysis methodology that is both rigorous and intuitive. The ability to simplify the picture and to address schematically the impact of complex, often non-linear, effects is a fundamental skill of any good engineer. The PLL is a good training example for the designer.