Now that we have been introduced to the fundamentals of Verilog, we make a slight change in course to return to the top level of the design flow shown previously in Figure 1.2. In particular, we now discuss the process by which we define the instruction set of a new processor.

The instruction set architecture (ISA) of a processor defines all of the instructions available in the processor plus the storage elements that are accessible to the assembly language programmer. The contents of these storage elements, plus a few more that may not be directly accessible to the programmer, comprise the processor's state.

In this chapter, we show how the ISA of a complete processor, which we call the Very Small Processor Architecture, or VeSPA for short, is defined, refined, and ultimately specified. This processor is quite simple, with only slightly more than a dozen instructions. However, it is a complete processor capable of executing programs written in a high-level language compiled with an appropriate compiler. We use this processor throughout the remainder of this text as a vehicle for demonstrating the entire processor design process when using the Verilog hardware description language.

Instruction set design

The design of an instruction set for a new processor is more of an art than a science.