Book contents
- Systematic Design of Analog CMOS CircuitsUsing Pre-Computed Lookup Tables
- Reviews
- Systematic Design of Analog CMOS Circuits
- Copyright page
- Dedication
- Contents
- Symbols and Acronyms
- 1 Introduction
- 2 Basic Transistor Modeling
- 3 Basic Sizing Using the gm/ID Methodology
- 4 Noise, Distortion and Mismatch
- 5 Practical Circuit Examples I
- 6 Practical Circuit Examples II
- Book part
- Index
- References
6 - Practical Circuit Examples II
Published online by Cambridge University Press: 28 September 2017
Book contents
- Systematic Design of Analog CMOS CircuitsUsing Pre-Computed Lookup Tables
- Reviews
- Systematic Design of Analog CMOS Circuits
- Copyright page
- Dedication
- Contents
- Symbols and Acronyms
- 1 Introduction
- 2 Basic Transistor Modeling
- 3 Basic Sizing Using the gm/ID Methodology
- 4 Noise, Distortion and Mismatch
- 5 Practical Circuit Examples I
- 6 Practical Circuit Examples II
- Book part
- Index
- References
- Type
- Chapter
- Information
- Systematic Design of Analog CMOS CircuitsUsing Pre-Computed Lookup Tables, pp. 165 - 225Publisher: Cambridge University PressPrint publication year: 2017
References
6.7 References
Caruosone, T. Chan, Johns, D.A., and Martin, K., Analog Integrated Circuit Design, 2nd ed. Wiley, 2011.Google Scholar
Murmann, B., “Thermal Noise in Track-and-Hold Circuits: Analysis and Simulation Techniques,” IEEE Solid-State Circuits Mag., vol. 4, no. 2, pp. 46–54, 2012.Google Scholar
Schreier, R., Silva, J., Steensgaard, J., and Temes, G. C., “Design-Oriented Estimation of Thermal Noise in Switched-Capacitor Circuits,” IEEE Trans. Circuits Syst. I, vol. 52, no. 11, pp. 2358–2368, Nov. 2005.Google Scholar
Gray, P. R., Hurst, P., Lewis, S. H., and Meyer, R. G., Analysis and Design of Analog Integrated Circuits, 5th ed. Wiley, 2009.Google Scholar
Cline, D. W. and Gray, P. R., “A Power Optimized 13-b 5 Msamples/s Pipelined Analog-to-Digital Converter in 1.2 μm CMOS,” IEEE J. Solid-State Circuits, vol. 31, no. 3, pp. 294–303, Mar. 1996.Google Scholar
Silveira, F. and Flandre, D., “Operational Amplifier Power Optimization for a Given Total (Slewing Plus Linear) Settling Time,” in Proc. Integrated Circuits and Systems Design, 2002, pp. 247–253.Google Scholar
Yang, H. C. and Allstot, D. J., “Considerations for Fast Settling Operational Amplifiers,” IEEE Trans. Circuits Syst., vol. 37, no. 3, pp. 326–334, Mar. 1990.CrossRefGoogle Scholar
Hosticka, B. J., “Improvement of the Gain of MOS Amplifiers,” IEEE J. Solid-State Circuits, vol. 14, no. 6, pp. 1111–1114, Dec. 1979.Google Scholar
Bult, K. and Geelen, G., “A Fast-Settling CMOS Op Amp with 90 dB DC-Gain and 116 MHz Unity-Gain Frequency,” in ISSCC Dig. Tech. Papers, 1990, pp. 108–109.Google Scholar
Dastgheib, A. and Murmann, B., “Calculation of Total Integrated Noise in Analog Circuits,” IEEE Trans. Circuits Syst. I Regul. Pap., vol. 55, no. 10, pp. 2988–2993, Nov. 2008.Google Scholar
Abo, A. M. and Gray, P. R., “A 1.5-V, 10-bit, 14.3-MS/s CMOS Pipeline Analog-to-Digital Converter,” IEEE J. Solid-State Circuits, vol. 34, no. 5, pp. 599–606, May 1999.Google Scholar